8085 Instruction Summary by Functional Groups

MOV – Opcode

E,M -Operand

5E -HEX code

1 -Bytes

Data Transfer Group   Arithmetic and logical group
Move(with byte) Move immediate(with byte) ADD* (with byte) Increment**(with Byte) Logical* (With Bytes)
MOV A, A 7F   1

MOV A, B  78  1

MOV A, C  79  1

MOV A, D  7A  1

MOV A, E  7B  1

MOV A, H  7C  1

MOV A, L  7D  1

MOVA, M  7E  1

MOV B, A  47  1

MOV B, B  40  1

MOV B, C  41  1

MOV B, D  42  1

MOV B, E  43  1

MOV B, H  44  1

MOV  B,L   45 1

MOV B, M  46  1

MOV C, A  4F  1

MOV C, B  48  1

MOV C, C  49  1

MOV C, D  4A  1

MOV C, E  4B  1

MOV C, H  4C  1

MOV C, L  4D  1

MOV C, M  4E  1

MOV D, A  57  1

MOV D, B  50  1

MOV D, C  51  1

MOV D, D  52  1

MOV D, E  53  1

MOV D, H  54  1

MOV D, L  55  1

MOV D, M  56  1

MOV E, A  5F  1

MOV E, B  58  1

MOV E, C  59  1

MOV E, D  5A  1

MOV E, E  5B  1

MOV E, H  5C  1

MOV E, L  5D  1

MOV E, M  5E  1

MOVH,A  67  1

MOV H, B  60  1

MOV H, C  61  1

MOV H, D  62  1

MOV H, E  63  1

MOV H, H  64  1

MOV H, L  65  1

MOV H, M  66  1

MOV L, A  6F  1

MOV L, B   68  1

MOV L, C  69  1

MOV L, D  6A  1

MOV L, E  6B  1

MOV L, H  6C  1

MOV L, L  6D  1

MOV L, M  6E  1

MOV M, A  77  1

MOV M, B  70  1

MOV M, C  71  1

MOV M, D  72  1

MOV M, E  73  1

MOV M, H  74  1

MOV M, L  75  1

MVI A, Data  3E  2

MVI B, Data  06  2

MVI C, Data  0E  2

MVI D, Data  16  2

MVI E, Data  1E  2

MVI H, Data  26  2

MVI L, Data  2E  2

MVI M, Data  36  2

 

ADD A  87    1

ADD B  80     1 ADD C  81    1

ADD D   82    1

ADD E   83    1

ADD H  84    1

ADD L  85    1

ADD M  86    1

 

INR A  3C  1

INR B  04  1

INR C  0C  1

INR D  14  1

INR E  1C  1

INR H  24  1 INR L  2C  1

INR M  34  1

ANA A  A7  1

ANA B  A0  1

ANA C  A1  1

ANA D  A2  1

ANA E  A3  1

ANA H  A4  1

ANA L  A5  1

ANA M  A6  1

 

LXI ADC(with byte) INX(with byte) XRA(with byte)
Load

Immediate

B,dble              01

D,dble              11

H, dble             21

SP,dble             31

ADC A  8F  1

ADC B  88  1

ADC C  89  1

ADC D  8A  1

ADC E  8B  1

ADC H  8C  1

ADC L  8D  1

ADC M  8E  1

 

INX B   03    1 INX D   13   1

INX H   23    1

INX SP  33   1

XRA A  AF  1

XRA B  A8  1

XRA C  A9  1

XRA D  AA  1

XRA E  AB  1

XRA H  AC  1

XRA L  AD  1

XRA M  AE  1

 

Load/ Store * Subtract*(with byte) DCR(with byte) ** ORA(with byte)
      LDAX  B    0A

LDAX  D    1A

LHLD       adr2A

LDA        adr3A

STAX   B   02

STAX   D   12

SHLD     adr22

STA       adr 32

SUB A  97  1

SUB B  90  1

SUB C   91  1

SUB D  92   1

SUB E   93  1

SUB H   94   1

SUB L   95  1

SUB M  96  1

 

DCR A  3D  1

DCR B  05  1

DCR C  0D  1

DCR D  15  1

DCR E  1D  1

DCR H  25  1

DCR L  2D  1

DCR M  35  1

   ORA A  B7  1

ORA B  B0  1

ORA C  B1  1

ORA D  B2  1

ORA E  B3  1

ORA H  B4  1

ORA L  B5  1

ORA M  B6  1

 

XCHG SBB(with byte) DCX CMP(with byte)
XCHG     EB SBB A  9F  1

SBB B  98  1

SBB C  99   1

SBB D  9A  1

SBB E  9B  1

SBB H  9C  1

SBB L  9D  1

SBB M  9E  1

 

 

DCX B   0B

DCX D   1B

DCX H   2B

DCX SP  3B

 

CMP A  BF  1

CMP B  B8  1

CMP C  B9  1

CMP D  BA  1

CMP E  BB  1

CMP H  BC  1

CMP L  BD  1

CMP M  BE  1

 

Specials
DAA*    27

CMA     2F

STC     37

CMC     3F

byte = constact or logical/ arithmetic expression that evaluates to an 8-bit data quantity. (second byte of 2-byte instruction)

 

dble = constant or logical/ arithmetic expression that evaluates to a 16-bit data quantity.(second and third bytes of 3-bytes instructions).

 

adr= 16-bit address(second and third bytes of 3-byte instructions)

*= all flags (C, Z, S, P, AC) affected.

** = all flags except CARRY affected; (except INX and DCX affect no flags).

+ = only CARRY affected

 

DAD(double add) Arith and Logical Immediate
DAD B  09  1

DAD D   19  1 DAD H  29  1

DAD SP  39  1

 

ADI byte     C6

ACI byte     CE

SUI byte     D6

SBI byte     DE

ANI byte     E6

XRi byte     EE

ORI byte     F6

CPI byte     FE

 

 

  Rotate
RLC       07

RRC       0F

RAL       17

RAR       1F

 

BRANCH CONTROL GROUP   I/O AND MACHINE CONTROL   ASSEMBLER REFERENCE
JUMP STACK   Ops Pseudo Instructions
JMP adr

JNZ adr JZ adr

JNC adr

JC adr

JPO adr

JPE adr

JP adr

JM adr

PCHL

C3

C2

CA

D2

DA

E2

EA

F2

FA

E9

PUSH General:
PUSH  B

PUSH  D

PUSH  H

PUSH  PSW

C5

D5 E5

F5

  ORG

END

EQU

SET

DS

DB

DW

CALL POP MACROS:
CALL adr CD

CNZ adr C4

CZ adr CC

CNC adr D4

CC adr DC

CPO adr E4 CPE adr EC

CP adr F4

CM adr FC

POP  B

POP  D

POP  H

POP  PSW*

C1

D1

E1

F1

MACRO

ENDM

LOCAL

REPT

IRP

IRPC

EXITM

XTHL SPHL E3 F9
Return   Input/Output   Relocation:
RET

RNZ RZ

RNC

RC

RPO

RPE

RP

RM

C9

C0

C8

D0

D8

E0

E8

F0

F8

 

  OUT byte IN byte D3 DB   ASEG

DSEF

CSEF

PUBLIC

EXTRN

NAME

STKLN

STACK

MEMORY

Control
DI

EI

NOP

HLT

F3

FB

00

76

    New Instuctions (8085 only)   Conditional Assembly:
RIM SIM 20

30

 

  IF

ELSE

ENDIF

  RESTART TABLE
Restart   Name Code   Restart Address
RST0

RST1

RST2

RST3

RST4

RST5

RST6

RST7

C7

CF

D7

DF

E7

EF

F7

FF

  RST 0

RST 1

RST 2

RST 3

RST 4

TRAP

RST 5

RST 5 5 RST 6

RST 6 5 RST 7

RST 7 5

C7

CF

D7

DF

E7

Hardware* Function

EF

Hardware* Function

F7

Hardware* Function

FF

Hardware* Function

  0000H

0008H

0010H

0018H

0020H

0024H

0028H

002CH

003BH

003CH

 

    *NOTE  The hardware functions refer to the on-chip interrupt feature of the 8085 only

 

PhD researcher at Friedrich-Schiller University Jena, Germany. I'm a physicist specializing in theoretical, computational and experimental condensed matter physics. I like to develop Physics related apps and softwares from time to time. Can code in most of the popular languages. Like to share my knowledge in Physics and applications using this Blog and a YouTube channel.



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